I have a similar issue. I'm working on a hardware multi-synth to make my custom 8-Bit insturment (comparable to MidiBox by Saurean). It features the YMF262, SN76489, YM2612, SAA1099, YM2413, YM2151, C140 (surrogate, not the actual chip), YM2610, YM2608 and one MCU to enable custom SSG things. I'm using the AS6C1608-55TIN SRAM (16MBit) for ADPCM and PCM dumps from ROM- and RAM-writes.
Currently the problem is how to program the RAM access? The dumps are planned to be written from SD directly to the SRAM (via Teensy 3.6). Now how to enable the YM2610 and YM2608 to access the RAM by DMA? They have dedicated address and data busses for ADPCM-A and -B (PAD, RAD, RA and PA -> YM2610 specs).
https://wiki.neogeodev.org/images/8/8c/ ... ge-006.jpgNormally (in Neogeo) those busses would directly address ROM and do bank switching. Actually one could build a workaround using two bidirectional bus transceivers (e.g. TXB0108, etc.) to give direct SRAM access to the YM2610. Would that be possible? Did someone have a similar issue before? Besides this everything's working flawlessly. Any response would be helpful.
Best regards from germany!